CPU Design, Technical Manager

Responsibilities

Expertise in power delivery networks (PDNs), signal integrity, and electromigration (EM) analysis, Codesign Bump planning

Experience in Power & Signal Integrity (IR, EM) analysis on application processors

Understanding of power integrity concepts, methodologies

Provide feedback and improvement suggestions to stakeholders to solve EM/IR

Support SoC in MCU Subsystem from Technical Feasibility Evaluation phase to post-Silicon debug phase

Requirements

Bachelor/Master’s Degree in Electrical/Computer Engineering

With minimum 8 years of relevant experience in similar industry

Experience handling challenges related with High-Speed CPU ARM Core Subsystem is a PLUS

Strong experience with Voltus or Apache Redhawk

Cross-site working experience is a PLUS

PERSOL Singapore Pte Ltd • UEN No. 200007268E • EA License No. 01C4394 •EA Registration No.R22109454 (Malcolm Lee Jun Hao)

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