GPU Functional Verification Engineer

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

GPU Formal Verification Engineer

In the role of GPU Formal Verification Engineer, your project responsibilities will include the following,

Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces

Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices

Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality

Collaborate with worldwide architecture, design, and systems teams to achieve all project goals

Currently, we are looking for candidates who can match one or more of the profiles listed below,

Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools – working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver

The pre-Si verification team in Bangalore is currently heavily involved in the following

UVM/SV based constrained random test bench for functional verification

Subsystem level TB for complete GPU workload analysis and compliance

Emulation platforms to analyze performance and pipeline bottlenecks

Formal tools – both for reduced time to bug & property based FV sign-off

Power Aware & Gate level simulations to deliver a high-quality GPU implementation

Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact Qualcomm Careers .