Applications Engineering, Sr Staff Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years close enough to real chip development to know that IP selection is never just a datasheet comparison. It is about power budgets that shift mid-project, timing constraints that emerge three months into integration, and system architects who need to understand tradeoffs without wading through 400-page specs. You have been in the room when a decision gets made, and you know how to shape that conversation so the right solution actually gets chosen.

You are technical enough to debug a timing closure issue or walk through a verification testbench, but you also know when to pull in the right specialist and how to translate what they say into something a customer's program manager can act on. You do not hide behind jargon. You ask the hard questions early, the ones that save everyone three weeks of rework later.

Working directly with customers energizes you. Not in a vague "people person" way, but because you genuinely want to see their chip work and you are willing to dig into their architecture, their constraints, and their schedule to make that happen. You have opinions about what good IP integration looks like, and you are not afraid to share them when it matters.

At Synopsys, you will work with some of the most advanced SoC teams in the world, and what you help them build will ship in products that matter.

What You'll Be Doing

Partner with the sales team to understand customer ASIC and SoC design challenges, then architect IP solutions from the Synopsys portfolio that actually fit their power, performance, area, and schedule constraints

Lead technical evaluations with customer engineering teams, coordinating with Synopsys product R&D to provide simulation models, testbenches, documentation, and direct engineering support

Conduct design reviews and technical presentations that help customers understand how our IP integrates into their RTL, timing, physical design, and verification flows

Serve as the voice of the customer back to Synopsys IP product teams, translating real-world integration issues and feature requests into actionable roadmap input

Troubleshoot complex integration issues involving RTL, synthesis, static timing analysis, and mixed-signal interfaces, working across customer and internal engineering teams to resolve them

Travel approximately 15-30% to customer sites, sales offices, and engineering centers across Japan and occasionally other regions

Build and maintain deep technical relationships with customer architects, design leads, and verification engineers who depend on your guidance to make their projects succeed

The Impact You Will Have

Enable customer SoC teams to make confident IP decisions earlier in their design cycle, reducing risk and avoiding costly late-stage changes

Accelerate customer time to tapeout by ensuring IP integration issues are caught and resolved during evaluation, not during implementation

Shape the Synopsys IP roadmap by channeling real customer requirements and market trends directly to product engineering teams Synopsys IP adoption across key market segments in Japan, including mobile, automotive, data center, and IoT, by demonstrating clear technical and business value

Build technical credibility that turns first-time evaluations into long-term strategic partnerships

Help customers navigate complex protocol and interface decisions across USB, PCIe, CXL, DDR, MIPI, HDMI, DisplayPort, Ethernet, and AMBA, ensuring their architectures are future-ready

Contribute to win rates and revenue growth by being the engineer customers trust when the stakes are high

What You'll Need

Bachelor's degree in Electrical Engineering with 8+ years of relevant experience, or Master's degree in Electrical Engineering with 7+ years of relevant experience

Strong working knowledge of SoC architectures and system-level design practices for at least one market segment such as mobile, storage, automotive, data center, networking, or IoT, particularly from an IP integration and requirements perspective

Hands-on experience with RTL design and verification using Verilog or SystemVerilog, including testbench creation and simulation

Solid understanding of synthesis, static timing analysis, and physical design flows, with enough depth to discuss timing closure and implementation tradeoffs with customer teams

Familiarity with analog and mixed-signal design and verification flows, plus a basic understanding of package and PCB design flows and technologies

Willingness and ability to travel 15-30% within Japan and occasionally to other regions to meet with customers, sales teams, and engineering groups

Experience with interface and connectivity protocols such as USB, PCIe, CXL, DDR, MIPI, HDMI, DisplayPort, Ethernet, or AMBA is a strong plus, as is prior experience selecting, using, designing, or supporting IP in a customer-facing or applications engineering role

Who You Are

You can walk into a customer meeting with incomplete information, ask the right clarifying questions, and leave with a clear technical plan that everyone agrees on

You know how to explain a complex tradeoff involving power, area, timing, and cost to a senior architect in two minutes without oversimplifying or losing the nuance

You are comfortable coordinating across multiple teams, internal R&D engineers, sales account managers, customer design leads, and you keep everyone aligned without letting details slip

You write clear, concise technical summaries and status updates that people actually read and act on, whether it is an email to a customer or a feature request to a product manager

You stay calm when a customer evaluation hits a snag or a timeline compresses, and you focus on solving the problem rather than assigning blame

You have a point of view on what good IP integration looks like, and you are willing to push back when a proposed solution does not serve the customer's best interest