Sr. Design Automation Engineer

Skyworks Solutions

Bengaluru, INonsitePosted Jul 16, 2026
Posting intelligenceActively listedReposted 2×, possible evergreen/ghost posting

Skills

regressionpython

About the role

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Job Title: Sr. Design Automation Engineer

Posting Start Date: 7/16/26

Job Location(s): Bengaluru

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.

Requisition ID: 77967

Job Description:

Description

Enable world-class analog and mixed-signal design on heterogeneous process technologies—from compound-semiconductor platforms (HBT, GaAs) to advanced foundry nodes at 22nm and below. You will develop, validate, and release process design kits for some of the most complex technoligies that design teams can trust: accurate models, verified rule decks, and documented design guidelines. Your work will have a direct business impact by enabling our design teams develop products with some of the most complex technologies on time, defect-free.

Responsibilities

Develop and maintain PDK components: device models, pcells, technology files, and DRC/LVS/PEX rule decks

Validate PDK releases against foundry documentation, reference structures, and internal design benchmarks

Support HBT and GaAs process technologies—device characterization, model fitting, and layout-aware design rules for RF applications

Enable foundry technologies at 22nm and above nodes for analog/mixed-signal design IPs

Collaborate with foundries, internal process teams, and design groups to resolve PDK gaps and drive closure on open issues

Build regression and QA infrastructure for PDK releases; maintain version control and release notes

Required Experience and Skills

M.Tech/M.E./M.S. in EE/CE or equivalent from a reputed university

3–5 years in PDK development, technology enablement, and CAD/methodology for analog/mixed-signal design

Hands-on experience with Cadence Virtuoso flows (OA database, pcells, techfile, rule deck integration)

Strong understanding of semiconductor device physics for analog/RF: MOS, bipolar/HBT, passive structures, and process corners

Experience with DRC/LVS/PEX deck development or validation in a production PDK environment

Proficiency in SKILL and/or Python for PDK automation and QA scripting

Ability to read and interpret foundry design manuals, DRMs, and model documentation

Detail-oriented approach to release management, versioning, and issue tracking

Desired Experience and Skills

Direct experience with GaAs or SiGe HBT PDKs for power amplifier, LNA, or switch applications

Familiarity with BAW/SAW filter process modules or integrated passive device (IPD) technologies

Experience enabling 22nmand up nodes for analog/RF (thick metals, inductors, varactors, high-voltage devices)

Background in device modeling or correlation between simulation and silicon data

Exposure to foundry interfaces

Understanding of RF-specific layout effects and EM-aware PDK considerations

#LIPR1

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