PMO-Memory IP Program Manage

Job Requirements

At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place - to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.

Key Responsibilities

Job Description for Memory IP Program Manager

We are looking for a Program Manager who will be responsible for managing Memory IP

development programs to ensure the program objectives are met successfully.

The candidate must have solid, hands-on experience in digital and/or mixed-signal IP design and/or

SoC development with a history of successfully leading or managing design programs. We are

looking for an individual with good leadership skills who takes ownership to ensure flawless

execution. The person needs to be passionate, be able to seamlessly work with multiple functional

teams, possess clear communication skills, and exhibit a strong ability to organize and structure

activities to ensure project success.

It is a full time role and the candidate will be required to work from Cadence Bengaluru office at

least 4 days a week.

Responsibilities

Work with the key project stakeholders to ensure clear project objectives and requirements

are in place

Develop, maintain, and distribute (as appropriate) standard project management

deliverables for the successful implementation of the project, including: implementation

plan, project schedule, project budget and variances, issues & action items log, meeting

minutes, risks assessment and contingencies.

Partner with development team leads to deliver on time and with the quality required.

Seamlessly work with teams across different timezones

Serve as the project owner in development process; maintaining quality checklists, Jira

tickets, schedule tracker etc.

Anticipate problems and complications and formulate solutions so as not to impede the

progress of the project.

Create and maintain scorecards and/or dashboard status to track project performance.

Be accountable for on-time project delivery, product quality, cost, and operations.

Qualifications

Bachelor’s degree (at the minimum) in engineering from an accredited institution.

12+ years of experience, out of which at least 3+ years of Program Management or Technical

Product Management experience in Chip Design/ VLSI organization.

Familiar with mixed-signal IP design flow and methodologies, Verilog/RTL coding,

Verification and Physical design flow

Excellent in English, both verbally and literarily, as a working language.

Excellent interpersonal skills and ability to communicate effectively with both technical and

nontechnical individuals.

Knowledgeable about interface IP like DDR, HBM, Serdes, UCIe etc is an added advantage

Demonstrated ability to think creatively and strategically when executing the project and

solving problems.

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.

We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.