Principal RFIC Engineer / RFIC Team Lead – Optical Engines (M/F/D)

Adtran

Berlin, DEonsitePosted Jul 10, 2026
Posting intelligenceActively listedReposted 25×, possible evergreen/ghost posting

Skills

principle

About the role

Welcome!

Our Growth is Creating Great Opportunities!

Our team is expanding, and we want to hire the most talented people we can. Continued success depends on it! Once you've had a chance to explore our current open positions, apply to the ones you feel suit you best and keep track of both your progress in the selection process, and new postings that might interest you!

Thanks for your interest in working on our team!

Principle Duties and Essential Functions

Lead the architecture, design, and validation of high‑speed RFICs (Laser Drivers, TIAs, analog front‑ends) for optical transceivers and optical engines

Act as technical and functional lead of the RFIC team, providing direction across multiple product programs

Define RFIC specifications and roadmaps aligned with coherent and direct‑detect optical platforms (100G, 800G ZR / ZR+, 1.6T ZR / ZR+)

Own technology selection and trade‑offs across SiGe BiCMOS, RF CMOS, and advanced foundry processes

Drive RFIC development through the full lifecycle: concept silicon bring‑up DVT PVT MP

Ensure RFIC performance against key metrics: bandwidth, noise, linearity, output swing, power, and robustness

Mentor and technically guide RFIC engineers and junior designers

Support recruitment and capability building (RFIC design, CAD, layout)

Contribute to long‑term technology strategy and next‑generation optical engine concepts

Represent RFIC technology internally and externally (foundries, partners, universities)

Knowledge, Skills and Experience Required

MSc or PhD in Electrical Engineering, Microelectronics, or related field

10+ years’ experience in high‑speed analog / RFIC design

Proven experience with optical transceiver or optical engine RFICs

Deep expertise in:

RFIC and high‑speed analog circuit design

Laser Drivers, TIAs, coherent / high‑speed analog front‑ends

Noise, linearity, signal integrity, and power optimization

Strong experience with Cadence design flow (Virtuoso, Spectre, EM tools)

Experience supporting silicon bring‑up, characterization, and qualification

Solid understanding of electro‑optic integration with Silicon Photonics

Demonstrated technical leadership in complex R&D environments

Ability to balance hands‑on technical work with roadmap and team leadership

Strong communication skills across disciplines and geographies

Comfortable working in a matrix, multi‑site organization

Benefits

Possibility to work in an international, multicultural environment

Strong team-oriented, friendly work culture

Flexible working hours model

Internal training program

Fitness, commuting and kindergarten allowances as well as drinks and fruits for free

Employee discounts e. g. for events and branded products

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