SRAM Layout Engineer

Position Summary

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

Must have 4 - 8 years of experience in SRAM Layout in advanced CMOS process

Should be able to perform SRAM Memory layout development and physical verification activities for complex designs as per provided specifications.

Should have expertise in layout area and routing optimization, design rules, yield and reliability issues.

Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.

Should have adequate knowledge of schematics, interface with circuit designer and CAD team.

Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,

Skills and Qualifications

Experience – 4 to 8 Years of experience

Qualifications

B.Tech/B.E/M.Tech/M.E

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