Senior Mixed-Signal Design Engineer (High-Speed SerDes)
About the role
Senior Mixed-Signal Design Engineer (High-Speed SerDes)
Location: San Jose, CA
We are seeking a Senior Mixed-Signal Design Engineer to design and develop high-speed SerDes analog and mixed-signal circuits for next-generation semiconductor products.
Responsibilities
Design and optimize high-speed circuit blocks including PLL, CDR, TX, DFE, and AFE/CTLE.
Perform circuit simulation, silicon validation, lab testing, and serial link characterization.
Collaborate with cross-functional teams throughout the product development lifecycle.
Troubleshoot design issues and present technical solutions.
Requirements
Master's degree or higher in Electrical Engineering or a related field.
Strong experience in mixed-signal and high-speed analog IC design.
Hands-on experience with one or more of PLL, DLL, CDR, DFE, TX, or AFE/CTLE.
Experience with silicon validation and laboratory testing.
Excellent analytical, debugging, and communication skills.
Pay: $85.00 - $90.00 per hour
Benefits:
Dental insurance
Employee assistance program
Health insurance
Professional development assistance
Referral program
Vision insurance
Experience:
mixed-signal and high-speed analog IC design: 5 years (Required)
Work Location: In person
Compensation
This Design Engineer role pays $85k-$90k/yr. Within typical range for design engineer roles in United States.
Questions about this role
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