Senior STA Engineer

Job Details:

Job Description:

The HIPD SAM team is responsible for delivering end-to-end Static Timing Analysis (STA) and timing sign-off for Intel's Client, Server and ASIC Hard-IP portfolios, as well as advanced test Chips for IP and SoC functional blocks and Subsystems.

Role Summary

The Senior STA Engineer (Staff - Grade 8) independently owns hands-on, end-to-end Static Timing Analysis and timing closure of complex multi-GHz blocks and full-chip designs at 3nm and below.

Key Responsibilities

Independently own block-level and full-chip STA from netlist handoff through final timing sign-off for multi-GHz designs.

Drive timing closure across multiple modes, corners, and scenarios (MCMM).

Define and own PVT corner definitions and extraction corner alignment.

Lead and execute STA methodologies including POCVM/AOCV/LVF.

Define and apply timing margining and guard-band strategies for silicon robustness.

Analyze and debug complex setup/hold, clocking, and constraint-related timing issues.

Develop scripting and automation in TCL/Python to improve analysis efficiency and quality.

Partner with Physical Design, Logic, Clocking, and Methodology teams.

Mentor junior engineers while remaining hands-on.

Qualifications:

• BS with 12+ years or MS with 10+ years of relevant STA experience. • Demonstrated silicon success closing timing on multi-GHz designs. • Deep hands-on expertise with Synopsys STA tools including PrimeTime and PTPX. • Strong STA methodology expertise: PVT corner definition, extraction corners, POCVM/AOCV/LVF, margining, MCMM. • Strong scripting and automation experience in TCL and/or Python.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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