Research Engineer/ Create Software EICACS2 project

Inria

Paris, FRonsitePosted Jun 23, 2026
Posting intelligenceActively listedReposted 15×, possible evergreen/ghost posting

At a glance

Highlights

  • Remote-first
  • Well-funded Series B
  • Strong equity upside
  • No on-call
  • Async-friendly

Heads up

  • On-call rotation required
  • Small eng team, wide surface area

Why this role might suit you

Research engineer role at Inria focusing on program verification and hardware-software interface, contributing to EICACS2 project with opportunities for technical depth and impact.

Skills

program-verificationstatic-analysisprogramming-language-semanticscompiler-verificationhardware-software-interfacemicroarchitecture-designmemory-hierarchysoc-designnoc-designfpga-designdma-designhardware-verification-languagescompilation-techniquessecurity-architecturestrusted-computingisolation-mechanismsattack-protection

About the role

Le descriptif de l’offre ci-dessous est en Anglais

Type de contrat : CDD

Niveau de diplôme exigé : Bac + 5 ou équivalent

Fonction : Personnel des fonctions support (IT)

Contexte et atouts du poste

The D&S research team at Inria is seeking a talented research engineer to contribute to the EICACS2 project as a

software engineer.

As a research engineer within EICACS2, you will work alongside talented engineers and researchers who contribute

to the state of the art in program verification, static analysis, programming language semantics, and compiler

verification.

The starting date of the position can be discussed and adjusted with the selected candidate.

Mission confiée

To address challenges related to digital and technological sovereignty, efficiency, reliability, hardware and software

security, and the reduction of technological obsolescence—whether for connected devices, embedded systems, or

high-performance computing systems—Inria is seeking to engineer with strong expertise at the hardware/software

interface.

The position targets researchers with expertise in one or more of the following areas:

Design of microarchitectures, memory hierarchies, and systems-on-chip (SoC) or networks-on-chip (NoC) for embedded systems or high-performance computing;

Very low-level software layers such as DMA, Programmable Logic Devices (PLDs/FPGAs), offloading techniques, and fine-grained management of hardware/software interactions;

Languages and tools for hardware design and verification;

Compilation techniques for adapting software to hardware execution platforms (DSLs, Just-In-Time compilation, static and dynamic rescheduling, etc.);

Security of software systems at the hardware/software interface, including secure architectures, trusted computing, isolation mechanisms, and protection against attacks.

Ideally, the candidate will combine strong expertise in one of these domains with substantial knowledge of at least

one of the others.

Highly technology-oriented profiles are particularly welcome.

A solid understanding of fields such as signal processing or artificial intelligence would be an additional asset, helping to anchor research activities in critical operational needs

Principales activités

Some of the more specific objectives of this position include:

Upgrading existing software and developing new software components;

Enhancing the interval analysis framework to also track properties;

Enabling the analysis of individual functions, rather than restricting analysis to complete programs only;

Conducting experiments to evaluate and measure the efficiency and precision of the analyzer.

Avantages

Subsidized meals

Partial reimbursement of public transport costs

Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.)

Possibility of teleworking and flexible organization of working hours

Professional equipment available (videoconferencing, loan of computer equipment, etc.)

Social, cultural and sports events and activities

Access to vocational training

Social security coverage

Informations générales

Ville : Paris

Centre Inria : Siège

Date de prise de fonction souhaitée : 2026-11-01

Durée de contrat : 12 mois

Date limite pour postuler : 2026-07-31

Attention: Les candidatures doivent être déposées en ligne sur le site Inria. Le traitement des candidatures adressées par d'autres canaux n'est pas garanti.

Consignes pour postuler

Sécurité défense :

Ce poste est susceptible d’être affecté dans une zone à régime restrictif (ZRR), telle que définie dans le décret n°2011-1425 relatif à la protection du potentiel scientifique et technique de la nation (PPST). L’autorisation d’accès à une zone est délivrée par le chef d’établissement, après avis ministériel favorable, tel que défini dans l’arrêté du 03 juillet 2012, relatif à la PPST. Un avis ministériel défavorable pour un poste affecté dans une ZRR aurait pour conséquence l’annulation du recrutement.

Politique de recrutement :

Dans le cadre de sa politique diversité, tous les postes Inria sont accessibles aux personnes en situation de handicap.

Contacts

Équipe Inria : DIRECTION (DIRECTION)

Recruteur :

Cosmidis Lucas / lucas.cosmidis@inria.fr

A propos d'Inria

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