Mixed Signal Logic Design Engineer

Job Details:

Job Description:

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications:

Bachelors with 4+ years of experience or master's with 3+ years of experience or PhD with 1+ years of experience in Computer Science or Computer Engineering or Electrical Engineering or related technical discipline

2+ years of experience with the following technical skills:

Proficiency in RTL design and coding using System Verilog and Verilog.

Expertise in mixed signal fundamentals, low-power design using UPF, and clock gating.

Deep understanding of digital and analog design principles, clock domain crossing, and power-performance tradeoffs.

Experience with hardware simulation tools and methodologies (VCS/Verdi). - Familiarity with IP environment and configuration management tools

Experience with Front End design tools for Lint, CDC, RDC, Voltage Domain Crossings, Synthesis, Low power design.

This position is not eligible for an intel immigration sponsorship.

Preferred Qualifications:

Demonstrated ability to debug complex logic designs, speed paths and validate system-level functionality.

Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic team environment.

Strong problem-solving skills, disciplined execution, and a proactive mindset.

DDR Design domain knowledge with good hold on DFI/DDR/LPDDR protocols

VSCode GitHub CoPilot or any other AI experience.- Exposed to Formal Property Verification and Git version control

Ability to drive an optimal solution between analog and digital designs

Familiarity with pre-silicon and post-silicon validation.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location: US, California, Folsom

Additional Locations: US, California, San Jose, US, California, Santa Clara

Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

Position of Trust N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.