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Senior Mask Design Engineer

NVIDIA

Santa Clara, USonsite$132k-$236k/yrPosted May 27, 2026

At a glance

Highlights

  • Hybrid work model
  • Competitive salary range
  • Equity and benefits
  • Cutting‑edge mixed‑signal layout work

Why this role might suit you

A senior mask layout engineer with deep analog CMOS experience can contribute to NVIDIA's advanced mixed‑signal products, collaborating across photonics, CMOS, and systems teams while leveraging industry‑leading Cadence tools.

Skills

cadence-virtuosodraculaherculescalibreprimeyieldperlpythonskill

About the role

Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling complex mixed-signal circuit designs! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Join our dynamic team today!

What you'll be doing:

The role entails working collaboratively and multi-functionally with a multi-disciplinary team of Photonics, CMOS, Electronics, and Systems engineers

Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in innovative sub-micron CMOS technologies using Cadence tools

You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

Job duties will include floor planning, custom layout and verifying against design rules and schematics.

Fill, post-processing, DRC mitigation, and foundry interactions

What we need to see:

BS in Electrical Engineering (or equivalent experience)

At least 6+ years of hands-on layout design experience

Deep understanding of analog circuit layout concepts in submicron CMOS technologies. Validated experience with Cadence custom circuit design tools - particularly virtuoso

Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield

Ability to work optimally in a team, good interpersonal skills and positive energy.

Proficiency in scripting languages like perl, python, skill etc. Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and talented people in the world working for us. If you're creative and autonomous, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 132,000 USD - 207,000 USD for Level 4, and 148,000 USD - 235,750 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 31, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

Compensation

This Design Engineer role pays $132k-$236k/yr. Within typical range for design engineer roles in United States.

Questions about this role

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