Atom CPU Layout Design Engineer

Job Details:

Job Description:

This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

As an Atom CPU Layout Design Engineer, you will be part of a highly skilled team responsible for the design of future‑generation, high‑performance Intel Atom microprocessors. In this role, you will drive the physical implementation of a variety of memory compilers, custom IP blocks, and layout partitions that directly support Intel’s CPU products.

You will work in a dynamic environment where design challenges are complex, assignments are broadly defined, and solutions often require creativity, deep technical knowledge, and strong problem‑solving skills.

Your responsibilities will include, but will not be limited to:

Ensuring all physical design implementations follow best‑in‑class layout methodologies and deliver highly efficient, high‑quality results.

Independently performing and driving complex physical design assignments across multiple design stages.

Working closely with circuit design engineers to interpret schematics and translate them into optimized physical layouts.

Contributing across the full design flow—from leaf‑level cell layout to block‑level and top‑level integration.

Partnering with SoC teams and cross‑site design groups to ensure alignment, reuse, and consistency across projects.

Developing or enhancing layout scripts, macros, and automation solutions to improve productivity and design robustness (a strong plus).

The ideal candidate should exhibit the following behavioral traits:

Excellent communication and interpersonal skills.

Prioritization and multitasking skills.

Good analytical and problem-solving skills.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.

2+ years of experience in layout design.

Advance English level.

Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred Qualifications:

Master's degree in electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline.

2+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design.

2+ year of knowledge in Unix/Linux operating systems.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type: Experienced Hire

Shift: Shift 1 (Mexico)

Primary Location: Mexico, Guadalajara

Additional Locations:

Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

Position of Trust N/A

Work Model for this Role This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.